A diversion into FPGAs Dec 9, 2015
Last week’s exploration of “processing with limited computing power” a few decades ago has led me into another direction which turned out to be mesmerising and addictive…
All due to a chip called a Field Programmable Logic Array, which usually looks like this:
That’s a lot of pins - large FPGA’s can have over 1,000 pins, in fact!
What are they? What’s the point? Why are they so hard to use? Can we play with them?
Read on to find out, as usual there will be articles coming this week to explore the “field”:
- Move over, John von Neumann - Wed
- Building a MultiComp-based Z80 - Thu
- The language(s) of FPGAs - Fri
- TFoC - A wide performance range - Sat
Once again, there is an awful lot of ground to cover this week, but with a bit of luck, it’ll end up being a decent bird’s eye view of what this FPGA (and CPLD) stuff is all about…