Dive into Forth, part 3 Mar 9, 2016

The Forth adventure continues… this is part 3 of a series about Mecrisp Forth on ARM STM32F103 µCs - an amazing environment for interactively trying out the hardware in this well-established chip series.

As you’ll see, there’s quite a bit to explore…

This week highlights the capabilities and performance levels achievable with such a (fairly low-end) microcontroller, especially once you start enabling things like hardware interrupts, ADCs, DACs, timers, and DMA.

As always, there will be one article each day, as I prepare all the information I have been able to collect and figure out lately:

Here’s a little teaser for what will be presented in this week’s closing article:

Latest source code is available on GitHub.

If you’ve been following along: the API of this code is still in flux at the moment (i.e. “io-0!” and “io-1!” have been changed to “ioc!” and “ios!”, and other small details).

Next week, I’ll go into the big picture behind all this Forth stuff and JET. Stay tuned!

Update - the last article has been split in two, due to its length.

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