As described in this recent post, it should be possible to create a simple fixed frequency oscillator using just a few low-cost components. This could then be used as interrupt source to wake up an ATmega every millisecond or so.
Here’s a first attempt, based on a widely-used circuit, as described in Fairchild’s Application Note 118:
I used a CD4049 hex inverter, since I had them within easy reach:
The two resistors are 10 kΩ, the capacitor is 0.1 µF – and here’s what it does:
The yellow trace is VOUT, the blue trace is V1. Pretty stable oscillation at 456 Hz.
Unfortunately, the current draw is a bit high with these components: 140 µA idle, and 450 µA when oscillating! There would be no point, yesterday’s approach will take half as much current using just a single 0.1 µF cap.
If someone has a tip for a simple 0.5 .. 1 KHz oscillator which consumes much less power, please let me know…
1uA and about 1hz to 10khz http://www.discovercircuits.com/DJ-Circuits/2hzosc.htm
or a more stable one http://www.discovercircuits.com/DJ-Circuits/10secosc.htm
dont know if ether of these are what you are looking for and i havent tryed them so i dont know how well thay work
Found a couple more interesting circuits here – http://www.electronicsteacher.com/list-of-schematics/a/astable_circuits.php
in German but perhaps also some interesting ideas: http://www.elektronik-labor.de/Notizen/LowPower.html
Fantastic link – I love the way he keeps pushing the boundary! (Deutsch ist für mich kein Problem…)
Quote of the day: “Ich glaub ich muss jetzt aufhören” :)
Nein, vorwärts!
:-D
perhaps you can sense/use the 50Hz hum somehow ?
Neat idea, but note that this gives us 20 or 10 ms resolution at best.
If a spare IO pin is available that supports level sensitive interrupts, then you can place a capacitor on this IO pin with a large value pullup resistor to VCC. In in the init code, set the IO pin to output and discharge the cap. Then switch to input mode on the IO pin and put the micro to sleep. When the capacitor charges up, a wake event is generated. The main limitation is that the timing is not very good due to variations in VCC and the resistor and capacitor tolerances.
This is the approach I described two days ago on this weblog :)
http://www.play-hookey.com/digital/experiments/rtl_astable.html